A 500 W high-efficiency LDMOS amplifier for base station applications
It is important in modern wireless communication system to realize high-efficiency and linear power amplifiers. In spite of a large variety in efficiency-enhanced amplifier concepts, Doherty power amplifiers (DPA) are still quite popular in the base station market since they provide high-average efficiency (up to 50%) for signals with high peak-to-average ratio at a low circuit complexity. To achieve high efficiency at power back-off operation (usually in an order of 6 – 12 dB), various approaches of DPA have been reported over time. Among these solutions, n-way DPA is a very successful concept in improving average efficiency but at the cost of complicated circuit implementations, such as different drain supply voltage or separated input driving conditions. In view of this, a classical three-way DPA with a power ratio of 1:1.75:1 as well as a simple passive input circuit is presented. A prototype with an optimized circuit layout was demonstrated with LDMOS devices simply because up to date, LDMOS is still the preferred technology for base station power amplifiers due to its low cost, good linearity and high reproducibility. Measurement results of the demo show more than 55% efficiency with 9.9PAR WCDMA signal from 1805 MHz to 1880 MHz. By applying DPD, ACLR can be improved from -29 dBc to -60 dBc, showing that the DPA can be linearized easily.